PIC18F1230T-I/ML【PDF 277/318 页】IC PIC MCU FLASH 2KX16 28QFN

TOSH

Top-of-Stack High Byte (TOS<15:8>)

0000 0000

TOSL

Top-of-Stack Low Byte (TOS<7:0>)

0000 0000

STKPTR

STKFUL(5)

STKUNF(5)

—

SP4

SP3

SP2

SP1

SP0

00-0 0000

47, 53

PCLATU

—

Holding Register for PC<20:16>

---0 0000

PCLATH

Holding Register for PC<15:8>

0000 0000

PCL

PC Low Byte (PC<7:0>)

0000 0000

TBLPTRU

—

bit 21

Program Memory Table Pointer Upper Byte (TBLPTR<20:16>)

--00 0000

TBLPTRH

Program Memory Table Pointer High Byte (TBLPTR<15:8>)

0000 0000

TBLPTRL

Program Memory Table Pointer Low Byte (TBLPTR<7:0>)

0000 0000

TABLAT

Program Memory Table Latch

0000 0000

PRODH

Product Register High Byte

xxxx xxxx

47, 85

PRODL

Product Register Low Byte

xxxx xxxx

47, 85

INTCON

GIE/GIEH

PEIE/GIEL

TMR0IE

INT0IE

RBIE

TMR0IF

INT0IF

RBIF

0000 000x

47, 95

INTCON2

RBPU

INTEDG0

INTEDG1

INTEDG2

INTEDG3

TMR0IP

INT3IP

RBIP

1111 1111

47, 96

INTCON3

INT2IP

INT1IP

INT3IE

INT2IE

INT1IE

INT3IF

INT2IF

INT1IF

1100 0000

47, 97

INDF0

Uses contents of FSR0 to address data memory – value of FSR0 not changed (not a physical register)

N/A

POSTINC0

Uses contents of FSR0 to address data memory – value of FSR0 post-incremented (not a physical register)

N/A

POSTDEC0

Uses contents of FSR0 to address data memory – value of FSR0 post-decremented (not a physical register)

N/A

PREINC0

Uses contents of FSR0 to address data memory – value of FSR0 pre-incremented (not a physical register)

N/A

47, 66

PLUSW0

Uses contents of FSR0 to address data memory – value of FSR0 pre-incremented (not a physical register) –

value of FSR0 offset by W

N/A

FSR0H

—

Indirect Data Memory Address Pointer 0 High Byte

---- 0000

FSR0L

Indirect Data Memory Address Pointer 0 Low Byte

xxxx xxxx

WREG

Working Register

xxxx xxxx

47, 54

INDF1

Uses contents of FSR1 to address data memory – value of FSR1 not changed (not a physical register)

N/A

POSTINC1

Uses contents of FSR1 to address data memory – value of FSR1 post-incremented (not a physical register)

N/A

POSTDEC1

Uses contents of FSR1 to address data memory – value of FSR1 post-decremented (not a physical register)

N/A

PREINC1

Uses contents of FSR1 to address data memory – value of FSR1 pre-incremented (not a physical register)

N/A

47, 66

PLUSW1

Uses contents of FSR1 to address data memory – value of FSR1 pre-incremented (not a physical register) –

value of FSR1 offset by W

N/A

FSR1H

—

Indirect Data Memory Address Pointer 1 High Byte

---- 0000

FSR1L

Indirect Data Memory Address Pointer 1 Low Byte

xxxx xxxx

BSR

—

Bank Select Register

---- 0000

47, 57

INDF2

Uses contents of FSR2 to address data memory – value of FSR2 not changed (not a physical register)

N/A

POSTINC2

Uses contents of FSR2 to address data memory – value of FSR2 post-incremented (not a physical register)

N/A

POSTDEC2

Uses contents of FSR2 to address data memory – value of FSR2 post-decremented (not a physical register)

N/A

PREINC2

Uses contents of FSR2 to address data memory – value of FSR2 pre-incremented (not a physical register)

N/A

48, 66

PLUSW2

Uses contents of FSR2 to address data memory – value of FSR2 pre-incremented (not a physical register) –

value of FSR2 offset by W

N/A

FSR2H

—

Indirect Data Memory Address Pointer 2 High Byte

---- 0000

FSR2L

Indirect Data Memory Address Pointer 2 Low Byte

xxxx xxxx